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  1. general description the 74lvc2g14 provides two inverting buffers with schmitt-trigger input. it is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. the inputs can be driven from either 3.3 v or 5 v devices. this feature allows the use of this device in a mixed 3.3 v and 5 v environmen t. schmitt-trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. this device is fully specified for partial power-down applications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. features and benefits ? wide supply voltage range from 1.65 v to 5.5 v ? 5 v tolerant inputs for interfacing with 5 v logic ? high noise immunity ? complies with jedec standard: ? jesd8-7 (1.65 v to 1.95 v) ? jesd8-5 (2.3 v to 2.7 v) ? jesd8b/jesd36 (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? ? 24 ma output drive (v cc =3.0v) ? cmos low power consumption ? latch-up performance exceeds 250 ma ? direct interface with ttl levels ? unlimited rise and fall times ? input accepts voltages up to 5 v ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c. 3. applications ? wave and pulse shaper ? astable multivibrator ? monostable multivibrator 74lvc2g14 dual inverting schmitt tri gger with 5 v tolerant input rev. 6 ? 23 september 2011 product data sheet
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 2 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 4. ordering information 5. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. functional diagram table 1. ordering information type number package temperature range name description version 74lvc2g14gw ? 40 ? cto+125 ? c sc-88 plastic surface-mounted package; 6 leads sot363 74lvc2g14gv ? 40 ? cto+125 ? c tsop6 plastic surface-mounted package (tsop6); 6 leads sot457 74lvc2g14gm ? 40 ? cto+125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886 74lvc2g14gf ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74lvc2g14gn ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74LVC2G14GS ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202 table 2. marking codes type number marking code [1] 74lvc2g14gw vk 74lvc2g14gv v14 74lvc2g14gm vk 74lvc2g14gf vk 74lvc2g14gn vk 74LVC2G14GS vk fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram mnb082 1a 1y 1 6 2a 2y 3 4 mnb083 1 3 4 6 mnb084 2a 2y 1a 1y
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 3 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 7. pinning information 7.1 pinning 7.2 pin description 8. functional description [1] h = high voltage level; l = low voltage level. fig 4. pin configuration sot363 and sot457 fig 5. pin configuration sot886 fig 6. pin configuration sot891, sot1115 and sot1202 74lvc2g14 1a 1y gnd 2a 2y 001aab672 1 2 3 6 v cc 5 4 74lvc2g14 gnd 001aab673 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6 74lvc2g14 gnd 001aaf957 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description 1a 1 data input gnd 2 ground (0 v) 2a 3 data input 2y 4 data output v cc 5 supply voltage 1y 6 data input table 4. function table [1] input output na ny lh hl
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 4 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 9. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. [3] for sc-88 and tsop6 packages: above 87.5 ? c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 118 ? c the value of p tot derates linearly with 7.8 mw/k. 10. recommended operating conditions table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v i ik input clamping current v i < 0 v ? 50 - ma v i input voltage [1] ? 0.5 +6.5 v i ok output clamping current v o > v cc or v o < 0 v - ? 50 ma v o output voltage active mode [1] [2] ? 0.5 v cc + 0.5 v power-down mode [1] [2] ? 0.5 +6.5 v i o output current v o = 0 v to v cc - ? 50 ma i cc supply current - 100 ma i gnd ground current ? 100 - ma p tot total power dissipation t amb = ? 40 ? c to +125 ?c [3] - 250 mw t stg storage temperature ? 65 +150 ?c table 6. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v power-down mode; v cc =0v 0 - 5.5 v t amb ambient temperature ? 40 - +125 ?c
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 5 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 11. static characteristics table 7. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ [1] max unit t amb = ? 40 ?c to +85 ?c v oh high-level output voltage v i = v t+ or v t ? i o = ? 100 ? a; v cc = 1.65 v to 5.5 v v cc ? 0.1 - - v i o = ? 4 ma; v cc = 1.65 v 1.2 - - v i o = ? 8 ma; v cc = 2.3 v 1.9 - - v i o = ? 12 ma; v cc = 2.7 v 2.2 - - v i o = ? 24 ma; v cc = 3.0 v 2.3 - - v i o = ? 32 ma; v cc = 4.5 v 3.8 - - v v ol low-level output voltage v i = v t+ or v t ? i o = 100 ? a; v cc = 1.65 v to 5.5 v - - 0.1 v i o = 4 ma; v cc = 1.65 v - - 0.45 v i o = 8 ma; v cc = 2.3 v - - 0.3 v i o = 12 ma; v cc = 2.7 v - - 0.4 v i o = 24 ma; v cc = 3.0 v - - 0.55 v i o = 32 ma; v cc = 4.5 v - - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v - ? 0.1 ? 5 ? a i off power-off leakage current v i or v o = 5.5 v; v cc = 0 v - ? 0.1 ? 10 ? a i cc supply current v i = 5.5 v or gnd; v cc = 1.65 v to 5.5 v; i o =0a -0.110 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.3 v to 5.5 v -5500 ? a c i input capacitance v cc = 3.3 v; v i = gnd to v cc -3.5-pf t amb = ? 40 ? c to +125 ?c v oh high-level output voltage v i = v t+ or v t ? i o = ? 100 ? a; v cc = 1.65 v to 5.5 v v cc ? 0.1 - - v i o = ? 4 ma; v cc = 1.65 v 0.95 - - v i o = ? 8 ma; v cc = 2.3 v 1.7 - - v i o = ? 12 ma; v cc = 2.7 v 1.9 - - v i o = ? 24 ma; v cc = 3.0 v 2.0 - - v i o = ? 32 ma; v cc = 4.5 v 3.4 - - v v ol low-level output voltage v i = v t+ or v t ? i o = 100 ? a; v cc = 1.65 v to 5.5 v - - 0.1 v i o = 4 ma; v cc = 1.65 v - - 0.7 v i o = 8 ma; v cc = 2.3 v - - 0.45 v i o = 12 ma; v cc = 2.7 v - - 0.6 v i o = 24 ma; v cc = 3.0 v - - 0.8 v i o = 32 ma; v cc = 4.5 v - - 0.8 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v - - ? 20 ? a
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 6 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input [1] all typical values are measured at maximum v cc and t amb = 25 ? c. [1] all typical values are measured at t amb = 25 ? c i off power-off leakage current v i or v o = 5.5 v; v cc = 0 v - - ? 20 ? a i cc supply current v i = 5.5 v or gnd; v cc = 1.65 v to 5.5 v; i o =0a --40 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.3 v to 5.5 v - - 5000 ? a table 7. static characteristics ?continued at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ [1] max unit table 8. transfer characteristics voltages are referenced to gnd (ground = 0 v; for test circuit see figure 8 symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max v t+ positive-going threshold voltage see figure 9 and figure 10 v cc = 1.8 v 0.70 1.10 1.50 0.70 1.70 v v cc = 2.3 v 1.00 1.40 1.80 1.00 2.00 v v cc = 3.0 v 1.30 1.76 2.20 1.30 2.40 v v cc = 4.5 v 1.90 2.47 3.10 1.90 3.30 v v cc = 5.5 v 2.20 2.91 3.60 2.20 3.80 v v t ? negative-going threshold voltage see figure 9 and figure 10 v cc = 1.8 v 0.25 0.61 0.90 0.25 1.10 v v cc = 2.3 v 0.40 0.80 1.15 0.40 1.35 v v cc = 3.0 v 0.60 1.04 1.50 0.60 1.70 v v cc = 4.5 v 1.00 1.55 2.00 1.00 2.20 v v cc = 5.5 v 1.20 1.86 2.30 1.20 2.50 v v h hysteresis voltage (v t+ ? v t ? ); see figure 9 , figure 10 and figure 11 v cc = 1.8 v 0.15 0.49 1.00 0.15 1.20 v v cc = 2.3 v 0.25 0.60 1.10 0.25 1.30 v v cc = 3.0 v 0.40 0.73 1.20 0.40 1.40 v v cc = 4.5 v 0.60 0.92 1.50 0.60 1.70 v v cc = 5.5 v 0.70 1.02 1.70 0.70 1.90 v
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 7 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 12. dynamic characteristics [1] typical values are measured at t amb =25 ? c and v cc = 1.8 v, 2.5 v, 2.7 v, 3.3 v and 5.0 v respectively. [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of outputs. 13. waveforms table 9. dynamic characteristics voltages are referenced to gnd (ground = 0 v). for test circuit see figure 8 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay na to ny; see figure 7 [2] v cc = 1.65 v to 1.95 v 1.0 5.6 11.0 1.0 12.0 ns v cc = 2.3 v to 2.7 v 0.5 3.7 6.5 0.5 7.2 ns v cc = 2.7 v 0.5 4.1 7.0 0.5 7.7 ns v cc = 3.0 v to 3.6 v 0.5 3.9 6.0 0.5 6.7 ns v cc = 4.5 v to 5.5 v 0.5 2.7 4.3 0.5 4.7 ns c pd power dissipation capacitance v i = gnd to v cc ; v cc = 3.3 v [3] - 18.1 - - - pf measurement points are given in ta b l e 1 0 . v ol and v oh are typical output voltage levels that occur with the output load. fig 7. the data input (na) to output (ny) propagation delays mna344 t phl t plh v m v m v m v m na input ny output gnd v i v oh v ol
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 8 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input table 10. measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5 ? v cc 0.5 ? v cc 2.3 v to 2.7 v 0.5 ? v cc 0.5 ? v cc 2.7v 1.5v 1.5v 3.0v to 3.6v 1.5v 1.5v 4.5 v to 5.5 v 0.5 ? v cc 0.5 ? v cc test data is given in table 11 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 8. load circuitry for switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 11. test data supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl 1.65 v to 1.95 v v cc ? 2.0ns 30pf 1k ? open 2.3 v to 2.7 v v cc ? 2.0ns 30pf 500 ? open 2.7v 2.7v ? 2.5ns 50pf 500 ? open 3.0v to 3.6v 2.7v ? 2.5ns 50pf 500 ? open 4.5 v to 5.5 v v cc ? 2.5ns 50pf 500 ? open
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 9 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 14. waveforms trans fer characteristics v t+ and v t ? limits at 70 % and 20 %. fig 9. transfer characteristic fig 10. definition of v t+ , v t ? and v h mna207 v o v i v h v t+ v t? mna208 v o v i v h v t+ v t? v cc = 3.0 v fig 11. typical transfer characteristics 01 0.5 1.5 2 v i (v) 0 14 10 12 8 4 6 2 mdb627 i cc (ma)
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 10 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 15. application information the slow input rise and fall times cause ad ditional power dissipation, which can be calculated using th e following formula: p add =f i ? (t r ?? i cc(av) +t f ?? i cc(av) ) ? v cc where: p add = additional power dissipation ( ? w); f i = input frequency (mhz); t r = input rise time (ns); 10 % to 90 %; t f = input fall time (ns); 90 % to 10 %; ? i cc(av) = average additional supply current ( ? a). ? i cc(av) differs with positive or negative input transitions, as shown in figure 12 . an example of a relaxation circuit using the 74lvc2g14 is shown in figure 13 . linear change of v i between 0.8 v to 2.0 v. all values give n are typical unless otherwise specified. (1) positive-going edge. (2) negative-going edge. fig 12. average i cc as a function of v cc 234 6 50 0 40 5 30 20 10 mnb086 i cc(av) (ma) v cc (v) (1) (2) fig 13. relaxation oscillator mna035 r c f 1 t -- - 1 0.8 rc ? --------------------- ? =
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 11 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 16. package outline fig 14. package outline sot363 (sc-88) references outline version european projection issue date iec jedec jeita sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 45 6 plastic surface-mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy wv mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 04-11-08 06-03-16
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 12 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input fig 15. package outline sot457 (tsop6) references outline version european projection issue date iec jedec jeita sot457 sc-74 wb m b p d e pin 1 index a a 1 l p q detail x h e e v m a a b y scale c x 13 2 4 5 6 0 1 2 mm plastic surface-mounted package (tsop6); 6 leads sot457 unit a 1 b p cd e h e l p qy wv mm 0.1 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 05-11-07 06-03-16
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 13 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input fig 16. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.50.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 14 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input fig 17. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 15 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input fig 18. package outline sot1115 (xson6) references outline version european projection issue date iec jedec jeita sot1115 sot1115_po 10-04-02 10-04-07 unit mm max nom min 0.35 0.04 0.95 0.90 0.85 1.05 1.00 0.95 0.55 0.3 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm sot1115 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l l 1 b 321 6 5 4 (6) (2) a 1 a
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 16 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input fig 19. package outline sot1202 (xson6) references outline version european projection issue date iec jedec jeita sot1202 sot1202_po 10-04-02 10-04-06 unit mm max nom min 0.35 0.04 1.05 1.00 0.95 1.05 1.00 0.95 0.55 0.35 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm sot1202 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l b 123 l 1 6 5 4 (6) (2) a a 1
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 17 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 17. abbreviations 18. revision history table 12. abbreviations acronym description cmos complementary metal oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model dut device under test table 13. revision history document id release date data sheet status change notice supersedes 74lvc2g14 v.6 20110923 product data sheet 74lvc2g14 v.5 modifications: ? conditions for high-level output voltage an d low-level output voltage changed (errata). 74lvc2g14 v.5 20101029 product data sheet 74lvc2g14 v.4 modifications: ? added type number 74lvc2g14gn (sot1115/xson6 package). ? added type number 74lvc2g14 gs (sot1202/xson6 package). 74lvc2g14 v.4 20070904 product data sheet 74lvc2g14 v.3 74lvc2g14 v.3 20070220 product data sheet 74lvc2g14 v.2 74lvc2g14 v.2 20040908 product specification - 74lvc2g14 v.1 74lvc2g14 v.1 20030731 product specification -
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 18 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 19.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 19.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. unless otherwise agreed in wr iting, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74lvc2g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 23 september 2011 19 of 20 nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. 19.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 20. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74lvc2g14 dual inverting schmitt trigger with 5 v tolerant input ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 23 september 2011 document identifier: 74lvc2g14 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 functional description . . . . . . . . . . . . . . . . . . . 3 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 10 recommended operating conditions. . . . . . . . 4 11 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 12 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 13 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 14 waveforms transfer characteristics. . . . . . . . . 9 15 application information. . . . . . . . . . . . . . . . . . 10 16 package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 17 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 18 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 19 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 19.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 19.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 19.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 20 contact information. . . . . . . . . . . . . . . . . . . . . 19 21 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20


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